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Battery Management Unit

BMU - QUT Motorsport

Joint project with Jarrod Fisher

Electronics Altium Microcontroller 4 Layer IsoSPI
Battery Management Unit PCB

Introduction

The Battery Management Unit serves several critical functions:

  • Communicates with slave cell monitoring units (CMUs) over IsoSPI
  • Filters and monitors reported cell voltages and temperatures
  • Runs cell balancing algorithm
  • Interfaces to charger for charge state management and pre-charge commands
  • Includes shutdown interface for Insulation Monitoring Device (IMD), precharge resistor thermal sensor (PDOC), connector interlocks, and BMU battery state detection

Design Requirements

FSAE Rules 2023

The core BMU (AMS - Accumulator Management System) requirements include:

  • Communication capability with cell monitoring units
  • Ability to trip shutdown circuit via relay during fault conditions
  • Fault indicator light implementation (hardware-based for Rev B)

IMD Requirements

  • Relay present to trip shutdown circuit if 12V status signal is not high
  • No programmable logic permitted
  • Fault indicator light required

Additional Design Constraints

  • Galvanic isolation between GLV and Tractive circuits
  • 12.7mm clearance for uncoated surfaces or 4mm under conformal coating
  • 3mm clearance for non-coated 600V nets; 1.105mm for conformal coated

Team-Specific Requirements

Including SD card logging, dual IsoSPI interfaces, USB-C debugging, dual CAN bus connections, and indicator LEDs.

Rev B Additional Requirements

Including latching of shutdown segments, non-programmable LED drivers, and auxiliary coil detection.

Design Solution & Assembly

The PCB was hand-placed and vapor phase oven soldered, with rails positioned for potential pick-and-place automation.

BMU Layer View
BMU PCB layer stack
BMU Reflow
BMU during vapor phase reflow soldering